Thermal Shield — 24 V Multi-Zone Thermal Controller

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Electronics

2026 Sole PCB designer

KiCadTivaC / TM4C123Power electronicsJLCPCB PCBA

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Figure 1. KiCad 3D render, top side — the six-FET load row, fuse bank, and screw terminals.

01 / What it is

What it is

A BoosterPack shield that turns a TivaC LaunchPad into a 24 V multi-zone thermal controller for a dry-ice freezer and battery-heater test rig. Six software-switched load ports at 2.5 A each, 15 A board total — every port fused, flyback-protected, and driven through its own power MOSFET.

Figure 2. The complete schematic — one page, six titled blocks, no hunting across sheets.

02 / Sixteen zones, one pin

Sixteen zones, one pin

Sixteen thermistor zones funnel through a 16-channel analog mux into a single ADC pin, and a dedicated thermocouple channel reads down to −78 °C dry ice. The whole design fits on one organized A1 schematic sheet — power entry, load ports, sensing, and headers each in their own titled block.

Figure 3. Bottom side — the two 2×10 LaunchPad sockets carry the board; load current never touches them.

03 / Designed to fail off

Designed to fail off

If the MCU is unplugged, rebooting, or crashed, every heater is off — pull-downs on the gate buffer guarantee it, and the buffer runs at 5 V because 3.3 V logic can't fully turn on a power FET. Even reverse-connecting the 24 V supply is survivable: two paralleled P-FETs block it while dissipating a quarter of the heat one would.

Qty	Part	Mfg / PN	Notes
1	EK-TM4C123GXL LaunchPad	TI	TivaC host — the shield rides on its two 2×10 sockets
6	60 V logic-level DPAK MOSFET		One per 24 V load port — 2.5 A each, 15 A board total
6	SS36 Schottky + 4 A mini-blade fuse		Per-port flyback and protection
2	SQD50P06-15L P-FET	Vishay	Paralleled reverse-polarity protection — 1.46 W each instead of 5.8 W in one
1	CD74HC4067M 16-ch analog mux	TI	Sixteen NTC zones on a single ADC pin
1	MAX31856 thermocouple ADC	Analog Devices	Type-T channel, rated for −78 °C dry ice
1	LM2596S-5 buck converter		24 V in → 5 V logic rail
1	74HCT244 gate buffer		5 V gate drive, 10 k pull-downs = heaters default OFF

Figure 4. Key parts — every line item verified in the board file before ordering.

04 / Verified, then ordered

Verified, then ordered

Zero ERC errors, zero DRC violations, a 42/42 pin-map check against a frozen source of truth, the thermocouple pair length-matched to 0.0000 mm, and every gate-drive trace on a single layer with no vias. The full JLCPCB production package shipped in July 2026: 4-layer ENIG, 83 machine-placed parts, 43 hand-solderable through-hole. The next revision — already in layout — moves the TM4C123 chip onto the board itself.